A newly-designed integrated circuit (“IC”) is typically fabricated over a process of several weeks, involving preparation of silicon substrate wafers, generation of masks, doping of the silicon substrate, deposition of metal layers, and so on. The IC typically has various individual electronic components, such as resistors, capacitors, diodes, and transistors. The metal layers, which may be aluminum, copper, or other conductive material, provide the interconnection mesh between the various individual electronic components to form integrated electrical circuits. Vias formed of electrically conductive material often provide communication pathways between various metal layers. Contacts provide communication links between metal layer and individual electronic components.
Unfortunately, a new IC of any complexity rarely works as expected when first fabricated. Normally, some defects in the operation of the IC are discovered during testing. Also, some functions of the IC may operate properly under limited conditions, but fail when operated across a full range of temperature and voltage in which the IC is expected to perform. Once the IC has been tested, the designer may change the design, initiate the manufacture of a second prototype IC via the lengthy process described above, and then test the new IC once again. However, no guarantee exists that the design changes will correct the problems previously encountered, or that all of the problems in the previous version of the IC have been discovered.
Charged particle beam systems, such as focused ion beam (“FIB”) systems, have found many applications in various areas of science and industry. Particularly in the semiconductor industry, FIB systems are used for integrated circuit probe point creation, failure analysis, and numerous other applications. Moreover, FIB systems may be used to edit a circuit (“circuit editing”) to test design charges and thereby avoid some or all of the expense and time of testing design changes through fabrication. A FIB tool typically includes a particle beam production column designed to focus an ion beam onto the IC at the place intended for the desired intervention. Such a column typically comprises a source of ions, such as Ga+ (Gallium), produced from liquid metal. The Ga+ is used to form the ion beam, which is focused on the IC by a focusing device comprising a certain number of electrodes operating at determined potentials so as to form an electrostatic lens system. Other types of charged particle beam systems deploy other arrangements to produce charged particle beams having a desired degree of focus.
As mentioned above, IC manufacturers sometimes employ a FIB system to edit the prototype IC, thereby altering the connections and other electronic structures of the IC. Circuit editing involves employing an ion beam to remove and deposit material in an IC with precision. Removal of material, or milling, may be achieved through a process sometimes referred to as ion sputtering. Addition or deposition of material, such as a conductor, may be achieved through a process sometimes referred to as ion-induced deposition. Removal and deposition are typically performed in the presence of gas, such as XeF2 for removal and platinum or tungsten organometallic precursor gases for deposition. Through removal and deposit of material, electrical connections may be severed or added, which allows designers to implement and test design modifications without repeating the wafer fabrication process.
Due to the increasing density of metal interconnections and number of metal layers, FIB based circuit editing through the topside of an IC is increasingly difficult. It is often the case that FIB milling to define access holes to reach a deep metal layer in the semiconductor structure would damage or destroy other structures or layers along the way. To avoid this, increasingly, FIB circuit editing is performed through the backside silicon substrate of the chip.
Conventionally, to access a target IC structure, a trench or hole is milled through the backside silicon substrate with the FIB beam in a raster pattern. Rastering the FIB beam occurs over anywhere from a 100 micrometer (μm)×100 μm square to 350 μm×350 μm square. However, with increasingly more dense device IC geometries, such sized FIB holes can affect the heat dissipation characteristics of the substrate. Moreover, the present inventors have recognized that a smaller raster pattern and hence a smaller trench can be completed more quickly, which decreases the time required for testing.
One particular problem with milling smaller trenches arises in determining when to stop a milling a procedure, often referred to as “endpointing.” Optimally, the trench is milled so that the floor of the trench (the amount of silicon remaining between the trench and the underlying integrated circuit structures) is the proper thickness for subsequent operations. With larger trenches, such as those exceeding 100 micrometer (“μm”)×100 μm, existing techniques, such as the voltage contrast technique discussed in U.S. Pat. No. 6,958,248 titled “Method and apparatus for the improvement of material/voltage contrast,” by Le Roy et al, which is hereby incorporated by reference herein, work well. However, as trench sizes are reduced, existing endpointing techniques are sometimes insufficient or do not work at all, and result in either a trench that is too deep or too shallow. In such cases, the target structure may be destroyed or the target structure insufficiently exposed for subsequent endpointing techniques, circuit editing operations, imaging, etc.
Another endpointing procedure employs a technique referred to as optical beam-induced current (“OBIC”) analysis. OBIC involves directing a laser on a junction area within a trench. The laser creates a current flow in the junction area. The magnitude of the current flow is a function of the amount of remaining silicon of the trench floor. OBIC works well when the number of junctions in the illumination area are well known, the silicon thickness versus current relationship is well characterized, and the beam can be controlled in order to illuminate a known number of junctions. As device geometry continually shrinks, the number of junctions in an area and the ability to illuminate known numbers of junctions becomes increasingly difficult, making OBIC more difficult to calibrate and use accurately for endpointing.
Thus, the efficiency and potential of charged particle beam, as well as other circuit editing and integrated circuit processing techniques are limited by the difficulty in determining when to stop a milling procedure and more generally the ability to control integrated circuit processing operations as the geometry of the working area continues to decrease.